NEUROMOR4µLed

INL Cluster

Neuromorphic computing chip for a neuron array based on µLEDs

Nowadays neuromorphic computing has arisen as one of the most promising fields to overcome the speed and energy efficiency limitations of conventional computing based on von Neumann architecture. These limitations are especially notable while computing large amount of data as of in internet-of-things (IoT), or in training procedure such as artificial intelligence (AI). Also, the von Neumann architecture itself is not optimized for speed due to the separated computing unit from the memory area. Massive computing leads to a speed bottleneck between the communication link of these two units. Neuromorphic computation inspires from the structure and operation of the human brain. Thus, mimicking brain compactness, speed decisions, and energy efficiency. In neuromorphic architecture, the computing unit and the memory unit are embedded in a single unit (neuron), thus speed highly increases due to the lack of the communication link as of in von Neumann computers. Furthermore, neuromorphic mimics the computing behaviour of the brain where certain areas of the brain “turn on” depending on the information to process. Thus, only certain circuits are used depending on the process, implying highly energy efficiency. In addition, disruptive neuron arrays architectures have been developed such as a neuron array based on microLEDs. This array is able to mimic the functioning of a group of neurons in terms of spike randomness and energy efficiency. However, these arrays suffer from difference between nominally equal neurons (also called mismatch) due to the manufacturing defects. Mismatch leads to latency problems in the form travelling time of the spikes (also influence for the neuron position across the array), but also differences in the amplitude of the spikes from different neurons. Another interesting topic to explore is to realize of which neuron generates a certain spike. Knowing the source of the spike, then it would be possible to fix the manufacturing defects of that neuron in order to provide the right spike (in terms of amplitude and travelling time). Another characteristic to investigate is the spike signal arrival time to the neuromorphic system, thus making neuromorphic circuit even more energy efficient. In sum, controlling and processing artifacts caused by manufacturing defects such as latency, mismatch, identification of the neuron producing the spike, and the spikes arrival time of a microLED neuron array have not been addressed yet. Furthermore the integration of neuromorphic circuit with a microLED neuron array in a single chip has not been developed yet. In the scope of the CROSSBRAIN and META-LED projects, the aim is to drive the neuron array, but neither controllingprocessing nor integration in a single chip.

NEUROMOR4µLED aims at developing a novel CMOS neuromorphic chip for controlling and processing the neuron array in a closed loop system in order to address manufacturing defects of the neuron array. Also, NEUROMOR4µLED aims at achieving integration for the first time of a microLED neuron array and a CMOS neuromorphic circuits in a single chip, thus, having a system-on-chip (SoC).
The strategy and methodology for achieving the goals of this project are as follows:

i. Fabrication and characterization of the microLED neuron array using an FPGA in order to identify travelling time thresholds and amplitude thresholds.

ii. In parallel, different neuromorphic architectures will be analysed and simulated. Architectures in terms of using analog, digital, hybrid neuromorphic circuits, as well as using a single readout per neuron or a column wise structure;

iii. Design of the neuromorphic device in standard 180 nm technology;

iv. Characterization of the neuromorphic chip;

v. Characterization of the neuromorphic chip together with the neuron array;

vi. SoC integration and characterization.

In order to achieve the objectives of this project, the INL state-of-the-art research infrastructure will provide interdisciplinary experts in CMOS IC design, machine learning, and system engineering. The project also counts with expert in nanophotonics-based ultrafast optical characterization (down to the single photon), advanced nanofabrication and integration, and spike information processing. The combination of these skills will fully support integration of our platform from device to functional system level, enabling a highly integrated neuromorphic technology system.

Moreover, NEUROMOR4µLED is in-line with initiatives such as IPCEI-microelectronics and the Chips Act. But also, this project can be used as a roadmap in terms of SoC integration placing Portugal at the forefront in a growing field market expected to uptake $7B by 2029.

Total Eligible Budget

50,000.00 €

INL Eligible Budget

50,000.00 €

INL Funding

50,000.00 €

Start Date

01-02-2025

End Date

30-04-2026

Grant Agreement Id

2023.15232.PEX

Funding Agency

FCT – Fundação para a Ciência e Tecnologia

Funding Framework

FCT

INL Role

Coordinator

Scientific Project Manager

Accel Abarca

Approval Date

02-08-2024